The outline dimensions of all JEDEC matrix trays are 12.7 x 5.35 inches (322.6 x 136mm).
Low profile trays with thickness of 0.25-inch (6.35mm) accommodate 90% of all standard components, such as BGA, CSP, QFP, TQFP, QFN, TSOP and SOIC. A high profile 0.40-inch (10.16mm) version is available to hold thick (high) components such as PLCC, CERQUAD, PGA (Pin Grid Arrays), modules and assemblies. A lot of thought was put into the design of JEDEC trays.
Trays are configured with flat cells in the center area to allow automated handing by vacuum pick up tools. A scalloped indent is sculpted into one side of the tray to allow the use of a pin to mechanically fix correct orientation during use.
A 45-degree chamfer in one corner provides a visual indicator of Pin 1 orientation of the components mounted in the tray. JEDEC trays are stackable within the same device family and maker’s model. Mixing multiple manufacturers’ brands is not recommended, even within the same device family, due to small differences from brand to brand. While JEDEC trays may be stacked to several feet high, in normal practice, stacking is limited to 5 to 7 trays.
An empty tray (without components) serves as the cover tray on the top of the stack. It is recommended to tightly strap the stack of trays with ESD quality Velcro® straps, heavy-duty conductive rubber bands, or other means.
During dry packing, the trays and contents are baked in industrial ovens for several hours at 125oC to get the moisture out of the components, and then sealed in moisture barrier vacuum bags (look for the dewdrop icon on the outside of the bag). Desiccant and humidity indicators are typically packed inside the bag. The trays and contents are vacuum-sealed in the moisture barrier vacuum bag for safe packing, storage and transport.
The maximum baking temperature is stamped into JEDEC trays. Exceeding the stated maximum baking temperature will cause the dimensions of the tray to alter; thus, potentially damaging the contents. The molding compound used during the tray’s manufacture determines the maximum temperature rating. Multiple compounds and/or powders are mixed together during the molding process to add specific features such as color, ESD properties, dimensional stability and maximum temperature ratings.
Typical temperature ratings for bakeable JEDEC trays are: 140oC, 150oC and 180oC. Higher temperature trays cost more. Baking is typically done at 125oC. For economy use a tray with the lowest temperature rating to perform the job. Non-bakeable trays rated at 50~75oC are available.
JEDEC trays are also known as “matrix” trays since the components are nested into pockets in fixed position rows and columns. The spacing (pitch) of each component pocket (cells) is defined by JEDEC standards. This allows automated pick and place machines to dimensionally locate and pick up the components from the tray and place onto a PC board. JEDEC trays are also required by industries outside of traditional electronics. The solar photovoltaic industry as well as the medical industry is enjoying benefits by using JEDEC trays during storage, handling and transport of devices specific to their industries.
JEDEC trays are available in a variety of colors, though black is the most popular color for microelectronics and IC devices. Carbon fibers or carbon powder is combined into the molding compounds to make ESD safe trays (conductive or dissipative). Anti-static, non- bakeable trays constructed from ABS (Acrylonitrile Butadiene Styrene) are available in multiple colors, such as blue, red, green, yellow, cream and white.